A Positional Filter Synthesis for Fpga Implementation
نویسنده
چکیده
The paper reports on some experiments with implementing positional digital image filters using field programmable devices. It demonstrates that a single field programmable device may be used to build such a filter. By using extensive pipelining in the design, the filter can achieve performance of 50 million pixels per second (using Xilinx XC4000E devices) and almost 90 MHz (in case of Virtex-2 devices. These results were obtained using automatic synthesis from VHDL descriptions, avoiding any direct manipulation in the design.
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